Lightweight, Single-Clock-Cycle, Multilayer Cipher for Single-Channel IoT Communication: Design and Implementation

The area of lightweight cryptography for constrained nodes has been quite well researched since the advent RFID tags. However, important issue integrated design a secure, ultra-low power, small-footprint IoT transceiver not received sufficient attention. objective this paper is to present such and evaluate its data rate power in presence cryptographic overhead compare security with that prior algorithms. proposed secure based on two main novel ingredients. first Edge-Coded Signaling (ECS) protocol - recently introduced technique single-channel, high-data rate, low-power dynamic signaling does require any clock recovery. second ingredient high-speed symmetric block cipher, HSA5/1, well-known $A5/1$ cipher generates full keystream one cycle. Both ingredients are combined lightweight, high-speed, multilayer tunable impact ECS’s consumption, energy efficiency, rate. provides additional layers packet make it difficult an attacker even receive legitimate packet, let alone decrypt by attacking HSA5/1 itself. In addition, encryption method may be easily configured modulate communication as function number cycles made available encryption/decryption stage. ECS prototyped verified both embedded FPGA platform. It also synthesized ASIC implementation $65nm$ CMOS technology shown preserve operation ECS, consuming only $27~\mu W$ at frequency $25MHz$ while requiring cycle executing 148-bit-key unit.